Re: [10GMMF] (10GMMF) revised task 2 and 4 minutes for 1 Dec 04
Title: Message
Paul,
I
appreciate your supporting attention on this subject. What I am referring is
based for the moment on experimental observation during our system test in
Berlin. I experienced similar behavior using EDC samples from different
companies. What I saw is not too much related to the time varying IPR (I guess a
time scale between 10ms and 100ms would cover more then any practical field
case) instead with the MMSE algorithm instability when the compensation needed
is close to maximum FFE+DFE capability. Stated in a different way, when pulse
energy is mostly spread outside single time step in almost homogeneously
fashion. In those cases, a slight change in fiber IPR makes the EDC collapsing
with a consequent synch loss from the cascaded CDR. I experienced those
behaviors during recent measurements involving polarization induced IPR. After
300 meters, a relatively slight change of the launching polarization of the
order of 30° very often makes EDC collapsing. Of course, dynamic changes will
add more troubles in EDC tracking, but the effect can be identified even
statically. Regarding your note on clock recovery I believe your feeling is
correct. In CKR based EDC architectures, the DFE sampling time is acquired
through clock recovery and this needs some pulse stability to provide
sufficient low jitter operation during the convergence phase. Unless the pulse
is not compensated, poor clock stability can induce strong MMSE convergence
deviation which suddenly falls into a "false lock position". With the
term "false lock position" I mean an erroneous
convergence minimum found by the MMSE algorithm. Sometimes I found
discrepancy between residual eye opening after EDC action and minimum RMS error.
I mean that under some circumstances the convergence point gives a minimum RMS
error which does not correspond to the maximum eye opening and to the minimum
BER. How could we get out from that "false lock conditions"? I hope those
observations could add a bit on EDC experimental flavor.
Best
regards
Stefano
To follow up on my
action item from the Dec 1 Task 2 & 4 call, I would like to express my
thoughts on the need for characterizing an EDC-based receiver for dynamic
channel response. An associated thread has been exchanged between Sudeep
and Stefano regarding TP3 testing, which I have copied below for reference.
In this excerpt, Stefano states that he has experimentally observed
instability in EDC response to changing channels. He describes it as a
divergence from stable minimum mean square error (MMSE) induced by dynamic
channel IPR.
-------------------------
On Dec 3
2004, Stefano Bottacchi wrote:
Sudeep,
Thank you for your kind response. Please find my
comments in line
highlighted in blue.
In addition I would like to
rise one flag:
Measurements show 300 meters can be reached under EDC
based quite lab
conditions. Polarization changes induced by source
fluctuation and
mechanical vibrations set dramatic changes in pulse
response starting
after 150 meters length. This is experimentally proved.
My question is
the following: the dynamic adaptation capability of MMSE
should take
with appropriate time constant and I guess this is achievable
(10ms to
100 ms would be enough for tracking temperature and mechanical
stress
induced fluctuations). My concern regards instead the MMSE
capability to
track the stable convergence minimum when pulse changes
occurs under
limiting compensation conditions. This would be quite usual
for 300
meters link length. Increasing the number of taps, increase
the
available number of MMSE minima for convergence and the algorithm
easily
jump out from previous stable condition. This too has
been
experimentally demonstrated. I guess TP3 stress test should account
for
this.
Best regards
Stefano
----------------------------------------------
I believe there is also another mechanism
that could cause bit errors due to channel dynamics, which may provide insight
into how to test for dynamic channel behavior. The optimal operation of
a sampling circuit depends on the stability of its reference clock.
Clock recovery from waveforms as dispersed as those created in 802.3aq
channels of interest is no easy task, meaning that it might not be done
optimally by all EDC device suppliers. Spectral and/or temporal
information is used to recover and stabilize the clock. It follows that
changes in the temporal or spectral information will cause the clock recovery
circuit to adjust its phase. For example, if the clock were locked to
the peak amplitude position of a waveform, and that waveform changed such that
the peak shifted in time, then the clock edges would also shift in time within
the waveform, resulting in samples from different locations of the waveform.
For an EDC device, the coefficients of the taps would need to be
adjusted correctly as the clock shifted. While it is understandable
that the clock recovery circuit can easily track changes at 10s of Hz,
Stefano's note indicates that the EDC device may not necessarily properly
adjust its tap coefficients with sufficient accuracy and speed to track and
the changing waveform without generating bit errors. If the clock phase
is also adjusting in response to the IPR dynamics, this compounds the
potential problem.
Given
his experimental observations, it becomes necessary to measure the dynamic
behavior of the EDC-based receiver. A TP3 test wherein the input
IPR changes its peak amplitude position at a rate of about 10 to 20 Hz might
be sufficient to determine if the receiver will deliver the target BER under
dynamic channel conditions. The simplest waveform that can accomplish
this would be a two peaked IPR (with peaks separated by perhaps 600 ps for a
300 m channel, or whatever represents worst-case behavior) where the peak
amplitude alternates between the two positions at 10s of Hz. One would
apply this dynamic IPR during the stressed receive sensitivity test.
Regards,
Paul
Kolesar
SYSTIMAX® SOLUTIONS
1300 East Lookout Drive
Richardson, TX
75082
Phone: 972.792.3155
Fax:
972.792.3111
eMail:
pkolesar@systimax.com