RE: XGMII or SPI-4 ?
Hi Wang,
None of these things are written on stone. With more and more ASICs coming
on the back end (Fabric side), it is becoming difficult to say where the PHY
is. SPI-4 is very much usefull on fabric interface and there are
similar PHY devices as they are on medium side. Moreover one could always
design PHY (please note that XAUI, XGMII both are optional) which could
talk on SPI-4 interface to MAC.
Regards,
Devendra Tripathi
VidyaWeb Inc.
Pune, India
Tel: +91-20-433-1362
> -----Original Message-----
> From: owner-stds-802-3-hssg@xxxxxxxx
> [mailto:owner-stds-802-3-hssg@xxxxxxxx]On Behalf Of Wang Wendeh
> Sent: Friday, May 11, 2001 8:26 AM
> To: Tim Warland
> Cc: Ben Brown; stds-802-3-hssg
> Subject: Re: XGMII or SPI-4 ?
>
>
>
> Hi Tim,
>
> Thanks for your comment. But right now I am totally confused.
> Since the document from OIF states clearly that SPI-4 is a
> service interface
> between
> Link Layer and PHY Layer, I don't know if I misunderstand the meaning or I
> have an
> out-of-date one. Could you educate me about this thing? Thanks a lot.
>
>
> Wang, WenDeh
>
> ----- Original Message -----
> From: Tim Warland <twarland@xxxxxxxxxxxxxxxxxx>
> To: Wang Wendeh <wendeh@xxxxxxxxxxxxx>
> Cc: Ben Brown <bbrown@xxxxxxxx>; stds-802-3-hssg
> <stds-802-3-hssg@xxxxxxxx>
> Sent: Friday, May 11, 2001 9:11 AM
> Subject: Re: XGMII or SPI-4 ?
>
>
> > Wang Wendeh wrote:
> >
> > > Hi Ben,
> > >
> > > Thank you for the valuable information. You mentioned that SPI-4 is an
> > > interface
> > > above MAC layer, so that means the MAC will be needed to be
> implemented
> in
> > > the PHY device, right? It is kind of different than before. I
> don't know
> if
> > > it will make
> > > the PHY device to be too complicated.
> >
> > This is not entirely correct. The SPI-4 bus is used for layer 3 traffic.
> > In other word, the data on SPI-4 is TCP/IP packets. In order to get
> > to a PHY which is a layer 1 device, you need to go through a layer
> > 2 device.
> >
> > The purpose of this study group is to define layer 1 and layer 2
> > functional standards for systems implementing ethernet (layer 2)
> > protocals.
> >
> > It is anticipated that component vendors will develop PHY devices
> > with either a XAUI or XSBI (or potentially XGMII) bus interface
> > to a layer 2 MAC device. The system interface from the MAC
> > (which is beyond the scope of this study group) shall be a layer 3
> > type bus such as SPI-4.
> >
> > --
> > Tim Warland P.Eng.
> > Hardware Design Engineer Broadband Products
> > High Performance Optical Component Solutions
> > Nortel Networks (613)765-6634
> >
> >
> >
>
>