[Fwd: Re: XAUI update from Interim meeting]
Pat,
Thanks much for your detailed response. Below, I will amplify on it
to make my point in better detail. For what it's worth, I was part
of the Fibre Channel group (MJS) on whose work a lot of the Ethernet
jitter specs are founded. Also, I work for a serdes manufacturer,
so I'm quite motivated to have specs that work.
Regards,
Mike Jenkins
pat_thaler@xxxxxxxxxxx wrote:
>
> Mike,
>
> I find it difficult to understand how a receiver can work with a floating
> mask with the center of the transition allowed to occur over a 0.6 UI
> window. Consider the following pathological transmitter case:
>
> 999 of 1000 transitions out of the transmitter have jitter that falls
> withing a .1 UI window
> 1 out of 1000 transitions falls .5 UI after the .1 UI window.
That's the reason for existence of the deterministic jitter
(DJ) component of total jitter (TJ). DJ is the pathological
part and it is limited to 0.36 UI. The remainder of the
jitter distribution is comprised of random jitter (Gaussian
with zero mean).
>
> This transmitter's output would meet a 0.6 UI floating window spec.
Below, I have recast your example with the bimodal distribution
limited to 0.36 UI, convolving it with random jitter to get to
0.60 UI total Jitter. I sketched in the distribution under
the far end template. (Hopefully, you're viewing this with
fixed width font.) The sketch is roughly to scale.
>
> A receiver PLL locking to that signal is going to locate the bit cell edge
> somewhere within the .1 UI window. The receiver will sample the level half a
> UI from where it believes the bit cell center is. When the transition occurs
> .5 UI after the window it will occur after the sampling point and an error
> will occur.
_____ ______
\ / \
\ / \
\ :<--- TJ/2 --->:<--- TJ/2 --->: / \
\: : :/ \
\ : / \
/ : \ /
/: : :\ /
/ : 0 UI : \ /
/ : : : \ /
______/ : :< DJ/2 >:< DJ/2 >: : \______/
: * : :
: * : :
: *** : :
: *** : :
: ***** * :
: ******* *** :
************ *********
**************** **************
^
|
~mean
The mean of this jitter will be just to the right of the left
peak (and very close for your 999-to-1 example. Now, if the
receiver lined up on this mean, the most trailing edge would
be at DJ/2 + TJ/2 = 0.18 + 0.3 = 0.48 UI. Close, but no error.
Below, I will go into why it's not even quite this extreme.
HOWEVER, if the spec requires the waveform to be lined up
such that the mean is at 0 UI, that pushes the right peak of
the distribution inside the template (hexagon), forcing it to
fail the test. This is why I'm railing against this change.
>
> Now this case may be a bit extreme, but I have seen signals in a copper
> system where most of the transitions were relatively tightly grouped and
> there were a few outlying transitions to one side so it isn't all that
> unusual.
I agree. What is more, the typical low-pass mechanisms in
copper (and my polemic is solely addressed to copper specs)
cause the tails to be skewed something like this example,
with the mean somewhat left of center between the extremes.
>
> The receive PLL will locate the average bit cell edge. Jitter affects the
> receiver to the extent that edges are skewed from the average bit cell edge.
> The receiver's ability to withstand jitter doesn't depend on the center of
> the distribution of edges. It depends on the distance of edges from the
> mean.
A receiver might use mean or median or some other statistics.
I'm not prepared to discuss such details. However, any real
receiver has a finite sensitivity and is presented with finite
input risetime. This causes the effective transition time to
be somewhat later than (i.e., to the right of) the point marked
by histograms on twenty-something GHz 'scopes.
For the above reasons:
* Adjusting the waveform in time relative to the template is
very appropriate, and
* Forcing the mean to be positioned at the 0 UI point of the
template will break that spec.
I hope you agree, and will join me in trying to remove this
recent change to P802.3ae. I'd appreciate your comments.
>
> Pat Thaler
>
> -----Original Message-----
> From: Mike Jenkins [mailto:jenkins@xxxxxxxx]
> Sent: Friday, June 08, 2001 6:29 PM
> To: Kesling, Dawson W
> Cc: Serial PMD reflector (E-mail)
> Subject: Re: XAUI update from Interim meeting
>
> Dawson, et al,
>
> Thanks much for your summary on the XAUI spec changes. I have
> a comment/question concerning the summary item stating: "The
> templates were centered in the data eye and not allowed to float."
>
> Unless I misunderstand, this change causes an inconsistency in
> the specification. In Fibre Channel, at least, eye masks (or
> templates) have been defined such that the left-most vertex is
> one half the total jitter (i.e., TJ/2) from the left edge of the
> bit period (i.e., at 0 UI). The right-most vertex is symmetrically
> TJ/2 from the right edge of the bit period (i.e., 1 UI), as shown
> in my crude character graphics below (if you have fixed-width font).
>
> _______ ___________
> \ / \
> \ / \
> \ :<- TJ/2 ->:<- TJ/2 ->: / \
> \: : :/ \
> \ : / \
> / : \ /
> / : \ /
> / 0 UI \ /
> / (bit \ /
> ________/ boundary) \___________/
>
> If the further constraint is added that 0 UI must be the mean of
> the jitter (i.e., zero crossing) distribution, then that FORCES a
> mask failure if the distribution is skewed, as it generally is in
> copper transmission media.
>
> The practice in Fibre Channel (for copper media) has been to freely
> adjust the X position of the waveform. This permits a waveform with
> jitter approaching the spec limit of TJ to fit legally on the template.
>
> The proposal to constrain the mean of the distribution to be at 0 UI has
> been voted down several times in the Fibre Channel jitter working group.
> If I am missing something, I would appreciate being clued in.
>
> Regards,
> Mike Jenkins
>
> "Kesling, Dawson W" wrote:
> >
> > Attached is a summary of XAUI progress and issues for those of you who
> could
> > not come to the Interim meeting last week. All changes and refinements
> will
> > be included in draft D3.1 due to be posted to the 802.3ae web site by
> 6/11.
> >
> > If you have questions that aren't answered in the attached summary and
> can't
> > wait until the draft is posted, please send them to the reflector audience
> > in general so that other attendees can help me answer them. I probably
> can't
> > respond quickly to ALL the questions that might otherwise be sent to me
> > personally!
> >
> > Thanks to all who participated so helpfully in St. Louis last week.
> Special
> > thanks to Anthony Sanders of Infineon and Tom Lindsay of Stratos Lightwave
> > for their extra effort on XAUI jitter leading up to (and after hours
> during)
> > the Interim.
> >
> > -Dawson Kesling, Intel
> > Editor, Clause 47
> >
> > <<St_Louis_summary.ZIP>>
> >
> > ------------------------------------------------------------------------
> > Name: St_Louis_summary.ZIP
> > St_Louis_summary.ZIP Type: application/zip
> > Encoding: Base64
>
> --
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> Mike Jenkins Phone: 408.433.7901 _____
> LSI Logic Corp, ms/G715 Fax: 408.433.7495 LSI|LOGIC| (R)
> 1525 McCarthy Blvd. mailto:Jenkins@xxxxxxxx | |
> Milpitas, CA 95035 http://www.lsilogic.com |_____|
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Mike Jenkins Phone: 408.433.7901 _____
LSI Logic Corp, ms/G715 Fax: 408.433.7495 LSI|LOGIC| (R)
1525 McCarthy Blvd. mailto:Jenkins@xxxxxxxx | |
Milpitas, CA 95035 http://www.lsilogic.com |_____|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~