| Thread Links | Date Links | ||||
|---|---|---|---|---|---|
| Thread Prev | Thread Next | Thread Index | Date Prev | Date Next | Date Index |
The intention of i-373 resolution was to clarify the behaviour of the State Diagram without changing the functionality."
Did a particular "victim/volunteer" do his usual verilog simulation on this to help validate this for you yet? If not, before the interim?
Hello 802.3cg,
Thanks to some of you working offline, we’ve found a regression in the PLCA DATA State Diagram caused by comment i-373 on D3.0.
The intention of i-373 resolution was to clarify the behaviour of the State Diagram without changing the functionality.
In the process, despite our best effort, we’ve missed some important changes that broke the DATA State Diagram function.
Please find attached to this e-mail the proposed changes meant to accomplish the original intention of i-373.
Any feedback would be much appreciated.
Kind Regards,
--
Piergiorgio Beruto
Senior System Designer
Canova Tech Srl.
"The Art of Silicon Sculpting"
Via Magliotto 2,
Campus Savona, Palazzina Branca
17100 Savona (SV), Italy
Phone: +39 049 7811065 ext. 265
GSM: +39 333 6333289
Skype: canovatech_pb
To unsubscribe from the STDS-802-3-10SPE list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=STDS-802-3-10SPE&A=1
To unsubscribe from the STDS-802-3-10SPE list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=STDS-802-3-10SPE&A=1