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[802.3_B400G_ELEC] 802.3df Architecture and logic ad hoc meeting announcement

Hi,

 

This email serves to announce the next IEEE P802.3df architecture and logic track ad hoc meeting. 

 

Date           Time                             Note  

April  26,  7am to 9am Pacific  (request due April 20 at 5pm Pacific, submission due April 24 at 5pm Pacific)

 

The call details will be available on the TF website at https://www.ieee802.org/3/df/public/adhoc/logic/index.html and can be found on the IEEE call and meeting calendar at https://www.ieee802.org/3/calendar.html

 

Focus of this ad hoc is to address concerns over the skew budget for 800GbE.

 

Anyone wishing to present, please email me (and John D'Ambrosia, please) the following information, per the due dates above:

  • Name of presenter
  • Affiliation of presenter
  • Title of presentation
  • Length of time requested (this should include time for questions and answers – presentation time, excluding Q&A, will be at the discretion of the chair, and should be assumed to be limited to 30 min)
  • Brief description of topic

 

The presenter shall e-mail a PDF, soft-copy version of the presentation to me (and John D'Ambrosia, please) in advance of the meeting, per the due dates above. 

 

All individuals submitting presentations should review the Procedures for Presenters Page: http://www.ieee802.org/3/df/public/presentproc.html

 

Please adhere to the Presentation Style Guidelines.  Also, to support the web site search tool used by the IEEE P802.3 web site the 'Document Information' fields of the PDF file must be completed as follows:

  • Title: Title of presentation
  • Author: Name(s) of author(s)
  • Subject: IEEE P802.3df Task Force

 

I want to remind all teleconference meeting participants to review the following documents prior to participation in an IEEE 802.3 meeting teleconference:

  • IEEE SA patent policy
  • IEEE SA Copyright Policy
  • IEEE SA Participation Policy

 

All these policies may be found at http://ieee802.org/3/policies.html

 

 

Thanks, Mark

IEEE P802.3df architecture and logic track leader

 

 

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