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[802.3_DIALOG] Call for interest - MII Optimized for an Exposed Interconnect

Dear Colleagues,

The following request for agenda time for a call for interest has been received from Jason Potterf. It will be discussed at the IEEE 802 LMSC November 2024 Plenary meeting in Vancouver, BC, Canada. If you have any questions, please get in touch with either Jason Potterf <jpotterf@xxxxxxxxx> or myself directly.
 
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This is a call for interest to initiate a Study Group to develop a PAR and CSD for an Ethernet Media Independent Interface (MII) optimized for an exposed interconnect, e.g., chip-to-chip. The growing body of IEEE 802.3 Copper PHY standards that operate at lower speeds has intensified the demand for a modern, optimized MII. Application of PHYs such as 10BASE-T1L, 10BASE-T1S, proposed 100BASE-T1L, proposed 10BASE-T1M, and potentially future PHYs would see benefit in both single and multi-port implementations. Such an effort may afford reduced pin count and implementation complexity while enabling data for multiple ports on a single interface and support for features such as PHY-Level Collision Avoidance (PLCA). Most importantly, it could provide a modern alternative interface for PHYs that would otherwise use various industry specifications not currently in IEEE Std 802.3.

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The call for interest will take place during the IEEE 802.3 Opening Plenary on the morning of Monday 11th November. A call for interest consensus building meeting has been scheduled to occur from 19:00 to 20:30 on the evening of Tuesday 12th November. The vote to determine if a Study Group will be formed will take place at the IEEE 802.3 Closing Plenary on the afternoon of Thursday 14th November.

Best regards,
David Law, Chair, IEEE 802.3 Ethernet Working Group
Phone: +44 1631 563729
Email:  mailto:dlaw@xxxxxxx

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