Re: [STDS-802-3-EPOC] PHY Link Ad Hoc Notes
Marek,
Thanks for sending out the presentation in advance. On the earlier email, you brought up the requirement to send presentations in advance of the ad hoc call. While I agree that this is good practice, we have not required it in the past. In fact, I don't believe that any of the other presentations were sent in advance. In most cases, I have asked people to send them out after the call. We only have a week between calls and I don't want to slow down submissions by requiring the early submissions. The ad hoc call is an opportunity to try ideas before the formal presentation at the main meeting. I don't think that the single slide proposal for an instruction format was a surprise or inappropriate since we had asked for ideas for instruction format on the previous call.
On your proposal, it isn't fully consistent with the motions/straw polls from the last meeting. We decided to lump the SFD into the preamble field and passed that in a motion on the defined format. We are asking for proposals for the format of the preamble that should include the SFD. I think that the preamble isn't QAM16 or covered by the FEC. It is minor point but I think that we can drop the SFD from the payload. Unfortunately, we didn't have time for a motion but we had a straw poll to add the configuration ID. You didn't have it in your payload format. Again, it is a minor point.
While we decided to include FEC, we didn't decide on the need for an additional CRC. I noticed that you included a CRC-32. I would like to see justification for it when combined with the FEC. Are we better off with a bigger FEC and not a CRC-32? A smaller FEC with a CRC-8/16/32? I'm not sure. I know that others have more detailed presentations on this subject in the works. I didn't include the CRC-32 in the instruction format for that reason.
On the Ad Hoc, you were against the proposed instruction format including an address and repeating write data count. You argued that it was too sensitive to errors that would come through the FEC/CRC. If I look at your proposal, I see the same sensitivity. If you get a bit error in the type or length, the frame can't be decoded. As I mentioned on the call, I don't believe that there is any reason that an address or length is more critical than write data. If a bit error is passed on almost any of the critical write data, it would be a big problem. The wrong center frequency, upstream PLC frequency, configuration ID, bit loading, exclusion band size, TDD/FDD mode, etc would be a problem. With that said, I think that error sensitivity is a topic related to the FEC/CRC decision and not the instruction format. I would also note that only the configuration of the upstream PLC frequency is required to be a write without verification. The transmit power level and transmit offset will be checked by the CLT PHY. Once the upstream PLC is up and running, the CLT PHY could decide to do write/verify if was concerned about the configuration. Personally, I don't think that it is necessary and I would do unverified broadcast writes to configure downstream channels.
The instruction format that you suggest has a much higher overhead. I really don't see the justification for the extra bytes. I also noticed that you moved the PHY address into the instructions. I only had a single address for each PLC frame since the read instructions should only trigger a single PLC frame in response. Multiple reads could be confusing for the upstream response.
Hope that is helpful and Thanks for the presentation.
Ed...
From: Marek Hajduczenia [mailto:marek.hajduczenia@xxxxxx]
Sent: Saturday, April 06, 2013 10:22 AM
To: STDS-802-3-EPOC@xxxxxxxxxxxxxxxxx
Subject: Re: [STDS-802-3-EPOC] PHY Link Ad Hoc Notes
Dear colleagues,
Attached please find an alternative (and more detailed) proposal for PLC framing. I identified a number of areas that will need more discussion, primarily associated with selection of PLC FEC and PLC CRC, PLC SFD sequence, as well as decision on whether individual PLCS data frames are fixed or variable size.
I also included proposal for the internal structure, addressing, and flexible data access mechanism, allowing for OAM-like behavior over the PLC, while allowing for direct addressing of individual registers (and bits within the register) together with chained sequential read/write operations.
I would like to ask for feedback before the call so that the proposal can be further polished and then hopefully discussed in more detail on the call next week
Please note that I do not discuss any PLC PMD related topics, including mapping into carriers, etc. I believe these should be discussed in parallel, to simplify detection of PLC SFD. For example, PLC SFD should start always in a known subcarrier relative to the start of the PLC channel, so that the data decoder can optimize the search mechanism to limit acquisition time. It is just a thought, but I believe we should not be discussing digital PLC and OFDM PLC parts separately.
regards
Marek Hajduczenia, PhD
ZTE Portugal
Standard Development and Industry Relations
Edifício Amoreiras Plaza,
Rua Carlos Alberto da Mota Pinto, nr. 9 - 6 A,
1070-374 Lisbon, Portugal
Office: +351 213 700 090
Fax: + 351 213 813 349
Mobile: +351 961 121 851 (Portugal)
From: Marek Hajduczenia [mailto:marek.hajduczenia@xxxxxx]<mailto:[mailto:marek.hajduczenia@xxxxxx]>
Sent: Wednesday, 03 April, 2013 11:26 PM
To: STDS-802-3-EPOC@xxxxxxxxxxxxxxxxx<mailto:STDS-802-3-EPOC@xxxxxxxxxxxxxxxxx>
Subject: Re: [STDS-802-3-EPOC] PHY Link Ad Hoc Notes
Ed, et al.,
Since it is not recorded in the minutes, but it was brought up on the call, I feel it is important enough to bring it up again. I would really appreciate if there were no more surprise presentations brought forward for discussion. It is hard enough to have to examine proposals on the fly on a small screen, written in minuscule font, but it is also wasteful in terms of time to have to formulate opinions on complex topics like PLC, its framing etc., on the fly. I think we would be better served being able to preview the presentations before the meeting.
With that said, I plan to develop an alternative framing proposal for the next call and distribute the draft presentation by next Monday. I would encourage everybody to follow similar approach and give other participants at least one working day to go through the materials ahead of the call.
Regards
Marek Hajduczenia, PhD
ZTE Portugal
Standard Development and Industry Relations
Edifício Amoreiras Plaza,
Rua Carlos Alberto da Mota Pinto, nr. 9 - 6 A,
1070-374 Lisbon, Portugal
Office: +351 213 700 090
Fax: + 351 213 813 349
Mobile: +351 961 121 851 (Portugal)
From: Ed (Edward) Boyd [mailto:ed.boyd@xxxxxxxxxxxx]
Sent: Wednesday, 03 April, 2013 9:31 PM
To: STDS-802-3-EPOC@xxxxxxxxxxxxxxxxx<mailto:STDS-802-3-EPOC@xxxxxxxxxxxxxxxxx>
Subject: [STDS-802-3-EPOC] PHY Link Ad Hoc Notes
All,
I have attached the slides from today's call. Here is the a summary of the call.
1) Editor for PLC
a. Most of PLC will be in the PCS and handled by Marek (digital and framing)
b. Saif/Joe will handle the rest of it in the PMA.
2) Huawei and Broadcom presented a Downstream Command Format proposal (at the end of the slides)
a. Efficient method to set blocks of configuration registers in the PHY.
b. Marek has concerns about errors in the PLC and impact to incrementing address.
c. Do we need to have FEC and CRC in PLC? Do we need to worry about undetected errors multiplying?
d. Qualcomm wants to consider no address and a fixed register set for PLC.
3) Baseline Proposal Review (slides 34-35)
a. One or more PLCs in the downstream is not clear.
b. 1MHz granularity for setting PLC location
c. General support for 6MHz min size of EPoC spectrum around PLC. Question on whether it could be 24MHz?
d. PLC hunting is a vendor specific algorithm but MDIO controls needs to be define. Bill K will make presentation.
e. 8 or 16 carriers for PLC are adjacent.
Thanks,
Ed...
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Edward Boyd | Sr Technical Director
Broadcom Corporation | (O) 707-792-9008 | (M) 707-478-1146
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