Re: [8023-POEP] Mark High vs Mark Low
Additional elements to making the low pulse work are:
1) Some implementations may use memory holdover - Class must be
reentered relatively quickly - e.g. a millisecond
or two.
2) A state machine like this needs to have a method of initializing and
resetting (starting and stopping). We need to reserve the bottom of the
detection range for reset (as Clay states). PSEs must go to below 2.8V
between detection cycles, but not 0V - some implementations might be
capable of maintaining memory at this voltage and a defined lower limit
will assist in a robust standard. A holdover approach may also have a
long retention period that a definite reset threshold will accommodate.
3) Clay's proposal infers that the PSE must act like a voltage source
in this mode - not a current source. Instantly switching from Class
voltage to current source will most likely cause a PD to undershoot the
voltage and
cause a state reset. I mention this because one way to implement
detection is as a current source, another is as a current limited
voltage source.
Regards,
Martin
Martin Patoka
Systems Engineer
Texas Instruments
214-567-5487
mpatoka@xxxxxx
-----Original Message-----
From: owner-stds-802-3-poep@xxxxxxxx
[mailto:owner-stds-802-3-poep@xxxxxxxx] On Behalf Of Clay Stanford (LTC)
Sent: Monday, June 26, 2006 7:29 PM
To: STDS-802-3-POEP@xxxxxxxxxxxxxxxxx
Subject: [8023-POEP] Mark High vs Mark Low
Joe,
Mark voltage high or mark voltage low is doable. Each has + and -'s.
We decided mark voltage low because with mark voltage high one can have
the following problem:
Consider a class 3 .af PD which is micro power from 21V to 30V.
.at PSE drives PD to -18V and classes.
.at PSE drives PD to -25V to create mark.
.at PSE attempts to drive PD to -18V.
But....PSEs can only drive PD more negative.
Only PD can discharge itself from in this case -25V to -18V. (PDs are
isolated by diodes and PSEs usually only pull down.) The above mentioned
PD might stay up above class voltage and stay in micropower mode,
thereby reporting class 0, or it might drop into class part way through
the PSE class measurement, thereby fooling the PSE into reporting some
class value between 0 and class 3.
Alternately, if using mark low voltage, after the PSE classes, an .af PD
may or may not discharge down into the signature range. Worst case
would be a class 0 PD which might not discharge the port. However, when
the PSE goes to class a second time, however far the PD has discharged
the port, the PSE will just drive it back to -18V. All is well.
With respect to operating memory in the signature range, if we keep the
mark voltage at say 7-10V, then at 7V, 25K draws 280uA. The memory
element probably uses little current compared to 280uA.
Clay
--- Joseph DeNicholas <Joseph.DeNicholas@xxxxxxx>
wrote:
> hi Clay -
> I had to drop off for a little while, the last I heard we didn't want
> the trigger to be in the signature range because the PD is in such a
> low power draw mode that it would be difficult to maintain the state
> if we went back into signature. Isn't this still a concern? To hold
> state the PD probably has to keep a bias regulator up, all on less
> than 10uA, no?
> thanks,
> joe d.
>
>
>
>
>
>
> "Clay Stanford (LTC)" <claystanfordltc@xxxxxxxxx> Sent by:
> owner-stds-802-3-poep@xxxxxxxx
> 06/21/2006 09:21 AM
> Please respond to "Clay Stanford (LTC)"
>
>
> To: STDS-802-3-POEP@xxxxxxxxxxxxxxxxx
> cc:
> Subject: [8023-POEP] 6-21-06
> Classificaiton Ad Hoc Results
>
>
> We made some decisions in today's meeting:
>
> 1. There will be an additional class between 7W and 15.4W.
>
> 2. We will focus on using the Ping-Pong Classification method until an
> unsolvable problem arises.
>
> 3. The "mark" voltage will be down in the signature range. For
> example, it may be 7-10V.
>
> Next week, we are going to concentrate on the voltage and timing
> issues surrounding Ping-Pong.
>
> thanks
>
> clay
>
>
>
>
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