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Re: [8023-POEP] Classification Vmark timings

Title: Classification Vmark timings
Yair,
 
Excellent, I am glad you've agreed with me on this subject.  Let's work together to vote it in.
 
Regards,

Thong Huynh
Thong Huynh
Senior Scientist
Maxim Integrated Products
120 San Gabriel Dr.  M/S 140 3rd Floor
Sunnyvale, CA  94086
1-408-530-6375
Thong_Huynh@Maximhq.com

From: Yair Darshan [mailto:YDarshan@microsemi.com]
Sent: Sunday, February 18, 2007 5:50 AM
To: Thong Huynh
Cc: STDS-802-3-POEP@listserv.ieee.org; Clay Stanford (LTC)
Subject: Classification Vmark timings

Hi Thong,

In January interim you have suggested to change Vmark time duration from 2-4ms to 6ms min, 12 ms max.

The reason for your suggestion was that there is not enough time to the port voltage to get to steady state so we can identify it correctly in order to implement reliable two finger detector at the PD side.

After checking this issue more I came to the following conclusions:

1.      Yes, it will be better to increase this time to 6ms minimum 12ms max to allow reliable implementations.

2.      We need to add additional requirement that in any case the sum of all events including Vmark will not be higher then 75ms.

Darshan Yair
Chief R&D Engineer

Analog Mixed Signal Group

Microsemi Corporation

1 Hanagar St., P.O. Box 7220
Neve Ne'eman Industrial Zone
Hod Hasharon 45421, Israel
Tel:  +972-9-775-5100,

Cell: +972-54-4893019
Fax: +972-9-775-5111

E-mail: <mailto:ydarshan@microsemi.com>.