RE: PSE vs. PD power dissipation again
Brian,
Thanks for your reply, since we have too much text in the file I will
comment on your reply by first presents some facts ("List of facts" )
that will answer for some of your questions and for the rest, I will refer
separately.
First my "List of facts":
Lets define the following:
Concept A: Only PSE has inrush current limit.
Concept B: PSE and PD has inrush current limit. PD is set lower than PSE.
1. In my presentation in March I have located an inrush current function
also in the PD, only for the purpose of allow simulations
and checking different " WHAT IF SCENARIOS ".
It allows checking what happen if PD inrush current limit is set bellow
PSE inrush current and vise versa.
2. My position is cut and clear:Use the inrush current limit in the PSE. PD
does not need this function at all.
2.1 The advantages of this approach are:
a - PD Cost is minimize, PD is more sensitive to cost than PSE.
b - PD has simple design requirements
c - We can support dynamic load changes.(We have all necessary filters
in PSE)
d- We can utilize the full 350mA (We need accurate current sensing
function anyway to sense the 10mA NO LOAD Condition)
e- We have all "Intelligence" concentrated in one place, we can modify
it and enhanced it as requirements are changed without worrying about PD's
all over the world
f - Usually PD's are smaller than PSE's and limited to low space and
has heat removal problems. PSE's equipped with fans air flow and larger
space.
g- To support (a) to (e), PSE have all building blocks anyway.
Mosfet, sense resistor, Opams, Filters etc, for all other
functions/requirements.
2.2 If you put Inrush current limit in the PD you add cost to PD.
2.3 If you put Inrush current limit in the PD you might block the
possibility to block the Mosfet in a chip from the same arguments that you
have used.
2.4 I agree that my approach might cause problems to integrate the Mosfet
into a chip in the PSE. HOWEVER IT WILL CAUSE PROBLEMS TO INTEGRATE IT WITH
CONCEPT B (In the PD).
2. The Isolating switch in the PD is a must in any concept. It is needed to
Isolate the Signature resistor from the rest of the circuit during
detection.
2.1 If the Isolating switch is used as a fast switch, the Mosfet can be very
small.
2.2 If the Isolating switch is used as a fast switch, the Mosfet can be very
small and If you want it can be integrated.
2.3 If the Isolating switch is used also to limit the current, you will have
the same problems of integrating it into a chip in the PD.
3. PD wants to see reliable power source with 44V-57V, 350avg, with out
shutting off for random current spikes. This level of service was given with
the old technology
when wall adapter was used (wall adapter can be line transformer+diode
bridge + capacitor, the switching voltage regulator is located on PD)
In addition see bellow some answers/comments to your reply
*************************************
[Brian Lynch] I think we are in agreement on this point. Either the
PSE or the PD needs to handle the inrush current, and therefore the
burden of size and cost. Where I think we disagree is on the degree
of limiting, and whether it is entirely in the PSE, the PD, or split
between the two.
Yair Darshan:
I agree that we disagree on the degree of limiting, and whether it
is entirely in the PSE,
the PD, or split between the two. And my point is that if we compare
the performance/cost ratio for all these option
we will see that the optimum from system point of view is to locate
the inrush current limiting in the PSE.
The hardware of this function will do also the following:
- Sensing Imin (10mA)
- Filtering Imin Transients caused by load changes or Voltage
changes at PSE output
- Over Current protection
- Current limit during normal operation (handling load changes with
shutting off PSE)
- Current limit during startup
- And much more, depending on requirements.
If you want to have the same level of service with Concept B, you
need these hardware also in the PD.
Now you can decide what option to choose according to the following
options.
1. I don't care about PD. I want to reduce PSE cost to minimum and
let PD designer "break their heads"
Or I am more interesting in integrating in PSE and not PD.
2. I want to optimize system performance, I want to take care PSE
and PD
I choose option 2.
The reason: PSE is created to serve PD. If PD will have hard time to
get reliable service from PSE, PD designer
will continue to use old technology method...
*************************************
[Brian Lynch] I am confused here. I see one switch in the PSE and
one
in the PD.
Yair Darshan : See "list of facts" 1,2 above.
*************************************
**********************************************************************
>> A low cost PD can use a small MOSFET, and a higher end device
may use a
larger.
> [Yair Darshan] Correct, but all the functions you have
>mentioned are already exist on the PSE (sense resistor, MOSFET,
opams
>etc) and now we are arguing on the MOSFET package size which is not
>important since the overall cost is much larger if we add
additional
>function to the PD. AND we don't save cost in PSE...
[Brian Lynch] I am looking at the long term solution, where an IC in
the
PD gives the functionality we need for a robust and versatile system
at
low cost. My understanding of your proposal still puts a sense
resistor
and switch in the PD. I believe the size of the MOSFET does matter,
not
only in cost but in component space and heat sinking. I think there
is
opportunity for savings in the PSE by putting the inrush in the PD
and
keeping the PSE switch small....maybe a SOT23 if we can get a vendor
involved. In your approach, that can never happen.
Yair Darshan
1. My proposal is that PD will not have inrush current limit
function. See "list of facts" 1 above.
2. In my proposal, at 500mA for 100mSec during startup you don't
need heat sink with D2PACK. Tested and
verified lots of times.
3. I agree that you can save some in PSE. Are you agree that what
you save in PSE will cost you much more in PD?
Are you interested only in PSE cost reduction? and not overall
system cost reduction? please advise.
**********************************************************************
> [Yair Darshan] We don't need design freedom where it is not
>required. 15W switching mode power supply working at the popular
100KHZ,
>does not need more than 470uF in its input. Guaranteed.
[Brian Lynch] 100kHz is popular today, and so is 500kHz and even
1MHz.
For ripple current capability, I agree that 470 is likely
sufficient,
but what-if a PD design wants to put in a larger cap for hold up
time?
Your definition has ruled out his doing so unless he adds complexity
to his system (an isolation diode and a trickle charger, for
example).
Yair Darshan
1. We have checked many applications (PD applications) and hold up
time requiring cap larger than 330uF was not found.
I am aware that maybe some future applications will require some
hold up time.
However, doing it by using larger caps can be done as long as the
PD designer knows that he has 500mA for TBDmsec
(50-100msec) and after that he has 350mA average. It is a spec.
problem and not a practical problem.
The PSE will limit the time for peak startup current.
2. In short, we can allow any capacitance value and the outcome will
be that it will take more time to reach the 44V.
**********************************************************************
> [Yair Darshan] If you are referring to the isolating
>switch, you don't need additional circuit. it works fine as
presented.
> The PD power supply will need the UVLO
>function in any concept after the big cap, and you can have it
free in
>commercial controller.
[Brian Lynch] I agree UVLO is free in most PWM controllers, but not
at the voltage thresholds a PD would want....not unless you add
circuitry
Yair Darshan
1. You need to offset this voltage. We did it in lab by adding 1
resistor and 1 zener.
2. In any case, the discussion on UVLO function is not relevant to
our issue which is "where to locate
the inrush current limiting?". The UVLO function is not a
function of the inrush current and is not
affected by it.
**********************************************************************
> [Yair Darshan] I think you miss the point here, or you are
in favor
>of putting the inrush current limiter in the PSE....., you can have
delay
>function by adding a cap if you want, but it is not a must since we
can
>allow the drop in the spec. In the circuit presented in March,
there is no
>drop, the voltage is going down to around 20-30V.
> We will have drop only if the isolating switch will work as
a fast
>switch.
[Brian Lynch] This is where it sounds like you are promoting current
limiting in both the PSE and PD to split the power loss.
If the PD MOSFET acts as a fast switch and the input voltage is
allowed to "drop to zero" before charging the bulk capacitor then we
get
into timing issues which I think are problematic in the long term.
Yair Darshan:
1. No, I have meant to kill the inrush function from PD from the above
reasons mentioned.
2. There is no timing issue that put more on PSE or PD shoulders. It is time
limited phenomena
that depend on specific implementation.
In my presentation, you don't have drop to zero state before the
isolation switch since the switch
is turn on through its gm curve and it acts as a resistor for limited
time.
If you use this switch as a fast switch, than you will have the drop to
zero situation. So what?
The PSE doesn't know about it. The PD does not know about it. The
isolating switch should have some
memory element in its gate to keep the switch on for limited time
(additional cap or so).
However it is with in the Isolating switch function
and we will need this function regardless of the question "where to
locate the inrush......"
- I agree with Karl remark during my presentation that the drop should be
specified and aloud in the spec.
but that's where its ends.
**********************************************************************
>> [Brian Lynch] I the 350+/-50ma and 500ma +/-50ma are reasonable
numbers.
>> I think putting the inrush control in the PD side provides a more
robust
>> solution that allows more design freedom and less opportunity for
>> mis-behavior.
> [Yair Darshan] I don't see how you reduce opportunity for
>miss-behavior, can you give some examples?
[Brian Lynch] I think that allowing the DC voltage to drop to zero
and
climb back to its final value during cap charging will cause
complication
in the PSE and in the PD and risks long term compatibility. The PD
needs
energy storage to keep the switch ON and the PSE needs to know NOT
to go
into another re-discovery phase. more complexity......
Yair Darshan:
1. I don't agree with you that allowing the DC voltage to drop to
zero and climb back to its
final value during cap charging will cause complication in the
PSE and in the PD and risks
long term compatibility. Analysis and lab tests shows that it
trivial and simple.
See additional comments on this above.
2. We can specify an limited time after discovery has fished in which PSE
port can be zero w/o starting discovery
again as per Karl proposal.
**********************************************************************
If inrush limiting is in both the PSE and PD as you showed in March,
then
why bother with inrush limiting in the PSE at all? Save the MOSFET
size
and the extra circuitry in the PSE. In the future, it is possible
that an
integrated MOSFET in the PSE WILL be cheaper than a two IC solution
if the
PSE switch is allowed to be small.
Yair Darshan:
1. As you understand by now, the inrush current limit function in the model
was and option to allow
analysis of all cases possible and not from the reason I want it there.
**********************************************************************
Let me try to summarize my view of the advantages of doing inrush
limiting in the PD.
1) The switch in the PSE may be kept small. In the long term it may
be
cheaper to integrate into the controller. An alternative is to use a
bipolar device as the switch. A SOT23 device is pennies.
Yair Darshan:
Sot23 cant support 0.35A continuos, may be you have meant to sot223?
2) The sizing of the switch in the PD is up to the PD designer. It
can be
integrated, a SOT23 or a D2PAK. It is up to them to decide.
Yair Darshan:
Can I understand from your wording that PSE is "us" and PD is "them"
I am in favor of optimizing all system not just PSE or just PD.
3) A discrete current limit circuit is possible in a low cost PD if
a Vbe
junction is accurate enough.
3) The specifications of the behavior of the PSE and PSE are
independent.
The timing of one size is not dependent on the other and the power
dissipation
of one side is not dependent on the other. Both PSE and PD designers
can
work in a well defined environment....a real benefit for reliability
concerns.
4) There are no timing issues on startup. Tolerances in timing are
transparent to the operation of the system. There is no doubt that
so long
as
V-I characteristics are obeyed, the system will work every time.
Yair Darshan:
Paragraphs 3,4 are relevant to Concept A with proper wording and tolerant
numbers.
If you look again in my presentation, you will see that it is required to
specify average current with peak current and timing. If you agree to that,
than you can combine the numbers for startup etc. and you get simple
definitions.
Thanks
Yair.
> -----Original Message-----
> From: Lynch, Brian [SMTP:brian_lynch@xxxxxx]
> Sent: ?, ??? 22, 2001 7:06 PM
> To: 'Yair Darshan'; Lynch, Brian; 'Dave Dwelley';
> stds-802-3-pwrviamdi@xxxxxxxx
> Subject: RE: PSE vs. PD power dissipation again
>
> Yair,
>
> See below for my reply. To help out readability, I'll edit some of
> the old text. (Sorry Bruce, The internet is not always friendly to
> text formatting (such as color) and so it doesn't always work. Maybe
> some separating ********* between topics will help readability).
>
> Brian
> *************************************************************************
> >> [Brian Lynch] If it is OK for a PD to get service "within a few
> seconds"
> >> then why do we concentrate so much on detection/classification time?
> If,
> by
> >> adding a classification step to discovery, we add 200ms, is that a
> >> problem? How much time will it take for the 100th port to come alive in
> a
> >> large system?
>
> > [Yair Darshan] I guess we have two scenarios: Case 1: Normal
> >operation, a new PD is hooked up to the system. What is the normal time
> that
> >the technician expect to get service with out thinking that some thing is
> >wrong? My opinion is 3-6 second. If the system has 100 ports or more and
> it
> >has some impact on detection time, with specific implementation and in
> other
> >implementation it is not an issue. Example: If the detection is done port
> by
> >port sequentially, than detection time is one of the major factor that
> sets
> >the "service time" . If the detection is done simultaneously for all the
> >port, than it has a little effect on service time.
> > In my opinion, the detection time is what it is since the detection
> >concept that finally we have chosen dictates the suggested 500mSec (with
> >good margin)due to the fact that it is a function of high impedance and
> some
> >capacitance.
> > Case 2: If we had problems for few hours or so, what is few seconds
> more?
> >
> > I do not think that adding 200mSec for classification
> >step is a real
> >problem. I personally, like the idea.
> [Brian Lynch] I agree.
> *************************************************************************
> >> [Brian Lynch] I agree that in startup the power has to be lost in
> either
> >> the PSE or the PD. That is physics. By putting the inrush current limit
>
> >> on the PD side, and setting the current limit to a value below the
> current
> >> limit in the PSE, we get a number of advantages.
> >> - The PSE switch losses are always low. Turn ON losses
> >> can be limited to 300mw for the initial "spike" and continuous
> >> operation losses are in the 100mw region. (assuming a 1 ohm MOSFET).
> >> In a practical case, the RdsON will be much less. A SOT-223 FET or SO-8
> >> with
> > [Yair Darshan] NOW TAKE THE ABOVE ADVANTAGES THAT YOU
> >SUGGESTED AND
> >SET THE PSE INRUSH CURRENT LIMIT TO BE HIGHER THAN THE
> >PD(ACTUALLY THE PD
> >WILL NOT HAVE INRUSH CURRENT LIMIT FUNCTION) AND YOU WILL GET THE SAME
> >ADVANTAGES IN PD........
> > (THE ISOLATING SWITCH CAN BE A VERY SMALL FET NOW,
> >SINCE IT CAN BE
> >DESIGN AS A SWITCH)
> [Brian Lynch] I think we are in agreement on this point. Either the
> PSE or the PD needs to handle the inrush current, and therefore the
> burden of size and cost. Where I think we disagree is on the degree
> of limiting, and whether it is entirely in the PSE, the PD, or split
> between the two.
> **********************************************************************
> Perhaps If I explain my interpretation of your proposal, that will help.
> 1) Place the majority of the inrush control in the PSE
> 2) To prevent the input line from being "shorted" the instant the
> bulk capacitor is connected (when vin reached 40-44 volts), place
> some amount of inrush limiting in the PD.
> 3) Now the power loss is split between the FETs in the PD and PSE.
> 4) Limit the PD bulk capacitance to 470uF to limit the startup time to
> 53ms.
>
> My comments to each of the above.
> a) (2) requires that "something" needs to keep the PD switch ON. To me,
> this is at least an added cap, a diode and resistor for a TDB time
> interval.
> b) (3) tells me that now both the PSE and PD switches need to be D2PAK.
> No future integration will be possible at these power levels.
> c) (2) the "some amount" of current limiting has to be well defined to
> avoid start up timing issues.
> d) In the event of a shorted wire, the PSE switch must handle the short
> for
> more than the time in (4). 26.5 watts for up to 100ms. Any faster, and
> the system may not start up.
> **********************************************************************
> > [Yair Darshan] Correct, but don't you agree that it is
> >better that he will not need to use this component at all in the PD?
> [Brian Lynch] I am confused here. I see one switch in the PSE and one
> in the PD.
> **********************************************************************
> >> A low cost PD can use a small MOSFET, and a higher end device may use
> a
> larger.
> > [Yair Darshan] Correct, but all the functions you have
> >mentioned are already exist on the PSE (sense resistor, MOSFET, opams
> >etc) and now we are arguing on the MOSFET package size which is not
> >important since the overall cost is much larger if we add additional
> >function to the PD. AND we don't save cost in PSE...
>
> [Brian Lynch] I am looking at the long term solution, where an IC in the
> PD gives the functionality we need for a robust and versatile system at
> low cost. My understanding of your proposal still puts a sense resistor
> and switch in the PD. I believe the size of the MOSFET does matter, not
> only in cost but in component space and heat sinking. I think there is
> opportunity for savings in the PSE by putting the inrush in the PD and
> keeping the PSE switch small....maybe a SOT23 if we can get a vendor
> involved. In your approach, that can never happen.
> **********************************************************************
> > [Yair Darshan] We don't need design freedom where it is not
> >required. 15W switching mode power supply working at the popular 100KHZ,
> >does not need more than 470uF in its input. Guaranteed.
> [Brian Lynch] 100kHz is popular today, and so is 500kHz and even 1MHz.
> For ripple current capability, I agree that 470 is likely sufficient,
> but what-if a PD design wants to put in a larger cap for hold up time?
> Your definition has ruled out his doing so unless he adds complexity
> to his system (an isolation diode and a trickle charger, for example).
> **********************************************************************
> > [Yair Darshan] If you are referring to the isolating
> >switch, you don't need additional circuit. it works fine as presented.
> > The PD power supply will need the UVLO
> >function in any concept after the big cap, and you can have it free in
> >commercial controller.
> [Brian Lynch] I agree UVLO is free in most PWM controllers, but not
> at the voltage thresholds a PD would want....not unless you add circuitry
> *************************************************************************
> > [Yair Darshan] I think you miss the point here, or you are in favor
> >of putting the inrush current limiter in the PSE....., you can have delay
> >function by adding a cap if you want, but it is not a must since we can
> >allow the drop in the spec. In the circuit presented in March, there is
> no
> >drop, the voltage is going down to around 20-30V.
> > We will have drop only if the isolating switch will work as a fast
> >switch.
> [Brian Lynch] This is where it sounds like you are promoting current
> limiting in both the PSE and PD to split the power loss.
> If the PD MOSFET acts as a fast switch and the input voltage is
> allowed to "drop to zero" before charging the bulk capacitor then we get
> into timing issues which I think are problematic in the long term.
> ***********************************************************************
> >> [Brian Lynch] I the 350+/-50ma and 500ma +/-50ma are reasonable
> numbers.
> >> I think putting the inrush control in the PD side provides a more
> robust
> >> solution that allows more design freedom and less opportunity for
> >> mis-behavior.
> > [Yair Darshan] I don't see how you reduce opportunity for
> >miss-behavior, can you give some examples?
> [Brian Lynch] I think that allowing the DC voltage to drop to zero and
> climb back to its final value during cap charging will cause complication
> in the PSE and in the PD and risks long term compatibility. The PD needs
> energy storage to keep the switch ON and the PSE needs to know NOT to go
> into another re-discovery phase. more complexity......
> If inrush limiting is in both the PSE and PD as you showed in March, then
> why bother with inrush limiting in the PSE at all? Save the MOSFET size
> and the extra circuitry in the PSE. In the future, it is possible that an
> integrated MOSFET in the PSE WILL be cheaper than a two IC solution if the
> PSE switch is allowed to be small.
> *************************************************************************
> Let me try to summarize my view of the advantages of doing inrush
> limiting in the PD.
> 1) The switch in the PSE may be kept small. In the long term it may be
> cheaper to integrate into the controller. An alternative is to use a
> bipolar device as the switch. A SOT23 device is pennies.
> 2) The sizing of the switch in the PD is up to the PD designer. It can be
> integrated, a SOT23 or a D2PAK. It is up to them to decide.
> 3) A discrete current limit circuit is possible in a low cost PD if a Vbe
> junction is accurate enough.
> 3) The specifications of the behavior of the PSE and PSE are independent.
> The timing of one size is not dependent on the other and the power
> dissipation
> of one side is not dependent on the other. Both PSE and PD designers can
> work in a well defined environment....a real benefit for reliability
> concerns.
> 4) There are no timing issues on startup. Tolerances in timing are
> transparent to the operation of the system. There is no doubt that so long
> as
> V-I characteristics are obeyed, the system will work every time.
>
>
>