Re: 10G-BASE-T question (dd1)

[Bruce LaVigne <bruce@xxxxxxxxxxx>]

Bob,
  I think Dan's concern, and mine as well, is that if we standardize on a wider interface than
is necessary in the future, it hinders devices which opt to put many interfaces on one chip --
switch chips, for example.  While it may not be a big deal for the NIC end, a large part of
the economics in a switch is how many ports/ASIC you can get.  The discussion of 32-bit
interfaces (really 64+) for early devices would be to not push the clock rate too far too fast;
but if that is the *ONLY* interface specified in the standard, then less-well-defined
potentially lower quality "industry standards" take over as technology gets better.

  The case in point is MII in 802.3, vs. SMII in the field.  SMII has issues with timing in
terms of the COL and CRS signals in half-duplex 100Mb networks, something that I
believe would have gotten a lot more scrutiny had it been done by the IEEE.  I realize
that there isn't much call for half-duplex, certainly at these speeds, but the point is that
this "industry standard" interface didn't get the broad level of scrutiny which goes on
in the IEEE process, and thus is not of the same caliber, yet we must live with it.

  I would much prefer to specify the upgraded (smaller) interface up front, perhaps in
parallel with a wider current interface, and get all the issues worked out at that time.

Bruce LaVigne


"Bob Grow" wrote:

> Dan:
>
> I don't share your primary concern (at least in perceived magnitude). An
> 8-bit interface is already included in the standard (GMII), all that need
> change is the clock rate (not something subject to discriminatory
> licensing).  A wider interface presents more constraints, and if wanted as
> an option must be used in evaluating a number of the PHY proposals. (A wider
> interface can affect preamble, IPG, and latency at a minimum.)
>
> --Bob Grow
>
> -----Original Message-----
> From: Dan Dove [mailto:dan_dove@xxxxxx]
> Sent: Tuesday, June 08, 1999 9:22 AM
> To: stds-802-3-hssg@xxxxxxxx
> Subject: Re: 10G-BASE-T question (dd1)
>
> Hi Jaime,
>
> Actually, I would be happy if we architected a solution that allowed us
> to set the width/clock-rate at initialization. This way, we could use
> a 32 bit wide implementation in early implementations, and possibly an
> 8 bit wide implementation later. Whether this is a hard configuration or
> negotiable via MDIO/MDC is negotiable.
>
> My primary concern is that we not standardize an obsolete technology
> that ends up being superceded by a proprietary implementation that
> does not have the rigorous design, or non-discriminatory licensing of
> an IEEE standard.
>
> I believe a small amount of foresight in the development of this
> standard will save us a lot of pain in the future.
>
> Best Regards,
>
> Dan Dove
>
> --
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>
> kardontchik.jaime@xxxxxxxxxxx wrote:
> >
> > Rogers,
> >
> > The figure on page 4 emphasizes more the maximum clock used in the
> > 10G-BASE-T architecture, 1.25 GHz, and the maximum baud rate
> > in the optical fiber, 1.25 Gbaud/sec.
> >
> > The actual width of the MII interface is a question open to discussion.
> >
> > Shimon Muller (Sun) suggested using a 32-bit wide interface (64-bit
> > wide if we include both the Tx and Rx). Dan Dove (HP), in the audience,
> > suggested that if we use a 32-bit wide interface we might end up with
> > a chip that is all I/Os surrounding a tiny design, and he suggested to
> > take here an agressive approach and stick to an 8-bit wide interface.
> >
> > I tend to agree with Dan for the same reason and for another one:
> > 32 TTL-type output drivers at the Rx would introduce a lot of
> > switching noise that could affect the analog blocks in the chip,
> > including the jitter of the transmitter.
> >
> > Jaime
> >
> > Jaime E. Kardontchik
> > Micro Linear
> > San Jose, CA 95131
> > email: kardontchik.jaime@xxxxxxxxxxx
> >
> > "Rogers, Shawn" wrote:
> >
> > > Jaime, I have a question concerning your presentation in Idaho.  On page
> 4
> > > of your presentation you state the following when comparing your
> 10G-Base-T
> > > proposal to 802.3ab (1000Base-T):
> > >
> > >    1000Base-T           10G-Base-T
> > >     GMII-8bit wide      10GMII - same
> > >
> > > Are you advocating a byte wide chip-to-chip interface between the PCS
> and
> > > Reconciliation sublayer in the MAC running at 1.25Ghz?
> > >
> > > Regards,
> > > Shawn
> > >
> > > -----Original Message-----
> > > From: Jaime Kardontchik [mailto:kardontchik.jaime@xxxxxxxxxxx]
> > > Sent: Monday, June 07, 1999 5:57 PM
> > > To: stds-802-3-hssg@xxxxxxxx
> > > Subject: 10G-BASE-T presentation
> > >
> > > Hello 10G'ers,
> > >
> > > For those that were not able to attend the Idaho meeting:
> > >
> > > The presentation on the 10G-BASE-T architecture given
> > > in Idaho included more material than the original posted
> > > two weeks ago.
> > >
> > > The updated presentation as given in Idaho is now in the
> > > web site,  replacing the old one:
> > >
> > > http://grouper.ieee.org/groups/802/3/10G_study/public/june99
> > >
> > > Jaime
> > >
> > > Jaime E. Kardontchik
> > > Micro Linear
> > > San Jose, CA 95131
> > > email: kardontchik.jaime@xxxxxxxxxxx
begin:vcard 
n:LaVigne;Bruce
x-mozilla-html:TRUE
org:Hewlett-Packard, Workgroup Networks Division
version:2.1
email;internet:bruce@xxxxxxxxxxx
title:Design Engineer
tel;fax:(916) 785-1199
tel;work:(916) 785-4194
adr;quoted-printable:;;8000 Foothills Blvd.=0D=0Am/s 5672;Roseville;California;95747-5672;USA
x-mozilla-cpt:;0
fn:Bruce LaVigne
end:vcard