Re: Comments on P802.3ae/D1.1
Please see my comment below to the question related to the
MIB counters aSectionCVs and aPathCVs.
At 11:18 PM 11/12/00 -0500, Ben Brown wrote:
>Hey,
>
>Here are some comments on the latest release of the draft.
>Comments from all of the clauses are combined. This is limited
>to those comments that weren't made (or heard) last week
>(I think).
>
>Enjoy,
>Ben
>
...
>30.5.2.1.7, page 58 & 30.5.2.1.14, page 60:
> aSectionCVs can be incremented for each errored bit in
> the B1 octet (the counter is incremented by a value
> between 0 & 8 for each SONET frame).
> aPathCVs can be incremented when any bit in the B3
> octet is in error (the counter is incremented by a
> value between 0 & 1 for each SONET frame).
> Why are these counters handled differently? I heard
> something about this being the way they are defined in
> SONET/SDH. Can I get a hard reference to those definitions
> if this is indeed the case?
aSectionCVs counts "BIP-N errors" while aPathCVs counts "block errors".
You can find the definition of BIP-N error and block error in
ANSI T1.231-1997:
Sections 8.1.1.1 "Error Detection Code", 8.1.1.1.1 "BIP-N Error",
and 8.1.1.1.2 "Block Error (BE)".
It also helps to read "BER and EDC Thresholds for SES" in Annex C of
ANSI T1.231-1997. It explains why SES threshold values for Section/Line
and Path are based on different definitions. In short, definitions
are different for historical reasons.
Regards,
Norival