RE: lack of address frame after reset
I also concur. Pat
-----Original Message-----
From: Devendra Tripathi [mailto:tripathi@xxxxxxxxxxx]
Sent: Tuesday, November 21, 2000 3:57 PM
To: David Law; dpannell@xxxxxxxxxxx
Cc: Edward Turner; stds-802-3-hssg@xxxxxxxx
Subject: RE: lack of address frame after reset
I concur with David. Let us keep it simple.
Tripathi.
At 06:38 PM 11/21/00 +0000, David Law wrote:
>Hi Don,
>
>While I agree that this is a valid point, and I also agree that your
proposal
>would be one way to fix this, I am not sure if we should be worrying about
>this
>one case. There are many other cases where, by neglecting to do the correct
>address cycle, errant software can either corrupt register contents, or
read
>incorrect information, yet we cannot protect against that. Hence if we
cannot
>prevent these events, should we be going to the trouble of protecting
against
>this one case of errant software after reset.
>
>Bye for now,
> David Law
>
>
>
>
>
>
>dpannell@xxxxxxxxxxx on 21/11/2000 17:32:20
>
>Sent by: dpannell@xxxxxxxxxxx
>
>
>To: Edward Turner/GB/3Com@3Com
>cc: stds-802-3-hssg@xxxxxxxx (David Law/GB/3Com)
>Subject: RE: lack of address frame after reset
>
>
>
>
>
>
>
>Allan brings up a valid issue with the new MDIO interface. If a read or
write
>is done after a reset without the address register being set, undefined
>operation will result. But this is easy to fix. All we have to do is
define
>that the address register is reset to zeros whenever a reset occurs. Now
the
>operation is deterministic. We could further define the register at
address
>zero to be a NOP. Writes don't effect anything and reads return all zeros.
>This prevents errant software from disrupting unintended register bits if
it
>doesn't follow the correct protocol.
>
>--Don Pannell
>
>
>
>
>
>"Edward Turner" <Edward_Turner@xxxxxxxxxxxx> on 11/21/2000 02:39:14 AM
>
>To: stds-802-3-hssg@xxxxxxxx
>cc: (bcc: Donald Pannell/Marvell)
>Subject: RE: lack of address frame after reset
>
>
>
>
>
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>Allan,
>
>I understand the concerns you are raising, but I don't think that any
further
>sequence checking is required in the standard. I don't believe that guards
>against errant MDIO software have been included in previous parts of the
>standard. If the software is not working correctly its behaviour is
>undefined.
>It could issue address frames and start writing to random locations.
>
>Regards
>Ed
>
>
>
>
>
>"Allan Keung" <akeung@xxxxxxxxxxxxxxxxxx> on 20/11/2000 15:18:38
>
>Sent by: "Allan Keung" <akeung@xxxxxxxxxxxxxxxxxx>
>
>
>To: Edward Turner/GB/3Com@3Com, stds-802-3-hssg@xxxxxxxx
>cc:
>Subject: RE: lack of address frame after reset
>
>
>
>
>
>Ed,
>
>Draft D1.1 Clause 33 on P.92 said w.r.t. the address registers -
>"At power up or device reset, the contents of the address register
>are undefined."
>
>After power-up or reset, for the case of an ill-behaved software
>that does not specify at least one address frame first
>before proceeding to a write or read operation, what should be
>the response of a MMD?
>
>I suppose for a write operation, the write will be simply ignored.
>What about a read operation, should the MMD responds with a 0
>(as if addressed to an undefined register) or no response at all
>(as if the wrong port/device is addressed).
>
>Can the spec. be more definitive on this point?
>
>Regards,
>
>Allan
>
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>
Best Regards,
Devendra Tripathi
Vitesse Semiconductor Corporation
3100 De La Cruz Boulevard
Santa Clara, CA 95054
Phone: (408) 986-4380 Ext 103
Fax: (408) 986-6050