Re: [802.3_ISAAC] Comment on presentation today

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To: STDS-802-3-ISAAC@xxxxxxxxxxxxxxxxx

Subject: Re: [802.3_ISAAC] Comment on presentation today

From: Ariel Lasry <00002b0585801bb1-dmarc-request@xxxxxxxxxxxxxxxxx>

Date: Tue, 9 Jan 2024 18:13:41 +0000

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Reply-to: Ariel Lasry <alasry@xxxxxxxxxxxxxxxx>

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Thread-topic: [802.3_ISAAC] Comment on presentation today

Hi Mehmet,

You are correct. The A-PHY v2.0 is not publicly available.

This is the same as for all the other SerDes mentioned in the presentation of Conrad.

The point of Ragnar’s question was about the trend in support for higher data rates for example with A-PHY 32Gbps.

To this Conrad replied that 32Gbps was realized with 2 Lanes with A-PHY.

Which is correct for A-PHY v1.1 with STQ cable.

To that I have just added the comment that from A-PHY v2.0, 32Gbps is supported over a single Lane over Coax or STP cable.

That is all.

Thanks

Ariel

From: Mehmet Tazebay <00002b0d1a6e9d74-dmarc-request@xxxxxxxxxxxxxxxxx>
Sent: Tuesday, January 9, 2024 6:56 PM
To: STDS-802-3-ISAAC@xxxxxxxxxxxxxxxxx
Subject: Re: [802.3_ISAAC] Comment on presentation today

WARNING: This email originated from outside of Qualcomm. Please be wary of any links or attachments, and do not enable macros.

Hi Ariel,

Thank you for the information. However, I think the white paper is not a sufficient condition as it only defines the features of the technology but not the technical details. I believe that the standard and technical details of APHY 2.0 are not publicly available, correct? If so, how can we review and discuss the technical feasibility of 32Gbps as it is claimed in the white paper?

Thanks,

Mehmet

On Jan 9, 2024, at 7:09 AM, Ariel Lasry <00002b0585801bb1-dmarc-request@xxxxxxxxxxxxxxxxx> wrote:

Hi all,

comments on Conrad’s presentation today on the 32Gbps A-PHY, since there was a question on that topic.

In A-PHY v2.0 it is on a single Coax or STP.

Reference: MIPI White Paper: Introduction to MASS

Thanks

Ariel

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