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John D'Ambrosia and I intend to make a presentation on the OIF CEI project. The OIF CEI project is a specification for 6+ and 11+ Gigabit signaling over backplanes. This presentation will review the problem statement, scope, requirements, objectives, and deliverables of the project. Thanks. Mike Lerer Chairman OIF PLL Consultant to Xilinx Box 636 Londonderry, NH 03053 E Mail: mlerer@fpga.com Cell: 1-603-548-3704